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Lithography Session


Date: 16 November 2017

Time: 14:30–17:00

Location: TechARENA 2

Sponsored by:


Since many years lithography has been a basic enabler for the continuation of Moore’s Law, and there is no reason to expect that this will change in the near future. The scope of lithography is even extending: it is not only targeted at further miniaturization of critical device features, but it also provides solutions for the patterning requirements that are implied by heterogeneous integration and functional diversification for the creation of smart systems.

In this session, these new trends and their associated lithographic challenges will be discussed. The presentations will address a variety of subjects, such as the progress in resist technology and metrology for EUV lithography, multiple e-beam lithography for secure unique chip fabrication, and full scale wafer imprint programmes for photonic and biomedical applications. This diversity reflects the fact that lithography is continuously re-inventing itself in order to serve an increasingly wide range of applications.


Agenda 2017


Organizing Committee:

Semiconductor Technology Programs Committee (STC)



Register Button 

No pre-registration required but you must register as a visitor, in order to gain access to the venue. We recommend to arrive early as seating is limited.


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